SN74LVC1G175DCKR

The SN74LVC1G175DCKR is a single D-type Flip-flop with asynchronous clear. This single D-type flip-flop is designed for 1.65 to 5.5V VCC operation. The SN74LVC1G175 device has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Ioff Supports live insertion, partial-power-down mode and back-drive protection
• Latch-up performance exceeds 100mA per JESD 78, class II
• Supports 5V VCC operation
• Inputs accept voltage to 5.5V
• Supports down translation to VCC
• Maximum tpd of 4.3ns at 3.3V
• 10µA Maximum low power consumption
• ±24mA Output drive at 3.3V
• ±50mA Continuous output current
• ±100mA Continuous current through VCC or GND

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