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The MachXO2 series ultra low power instant-ON Non-volatile Complex Programmable Logic Device (CPLD) has six devices with densities ranging from 256 to 6864 look-up tables (LUTs). In addition to LUT-based, low-cost programmable logic these devices feature Embedded Block RAM (EBR), Distributed RAM, User Flash Memory (UFM), Phase Locked Loops (PLLs), pre-engineered source synchronous I/O support, advanced configuration support including dual-boot capability and hardened versions of commonly used functions such as SPI controller, I²C controller and timer/counter. These features allow these devices to be used in low cost, high volume consumer and system applications. The MachXO2 devices are designed on a 65nm non-volatile low power process. The device architecture has several features such as programmable low swing differential I/Os and the ability to turn off I/O banks, on-chip PLLs and oscillators dynamically.
- Flexible logic architecture
- Ultra low power devices
- Embedded and distributed memory
- On-chip user flash memory
- Pre-engineered source synchronous I/O
- High performance, flexible I/O buffer
- Flexible on-chip clocking
- Non-volatile, infinitely reconfigurable
- TransFR™ Reconfiguration
- Enhanced system level support
Rakendused
Industrial, Consumer Electronics
Tehnilised andmed
FLASH
1280Logic Cells
132Pins
104I/O's
Surface Mount
85°C
-
No SVHC (25-Jun-2025)
105I/O's
Flash based FPGA
BGA
1
65nm
0°C
-
MSL 3 - 168 hours
BGA
1200Macrocells
Tehnilised dokumendid (1)
Seadusandlus ja keskkonnateave
Riik, kus toimus viimane oluline tootmisprotsessPäritoluriik:Malaysia
Riik, kus toimus viimane oluline tootmisprotsess
RoHS
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